Xilinx allows you to evaluate the CAN LogiCORE™ IP ("CAN") core in Simulation Only mode.

• Simulation-based Evaluation allows you to customize the core through a CORE Generator™ customization GUI and generate a Unisim-based gate level model for functional simulation.
• A Full System Hardware Evaluation version of the CAN LogiCORE IP allows you to do everything you can do with the Fully Licensed IP core, including configure place and route, simulate, estimate timing and program a Xilinx® FPGA device.

• Please refer to the Xilinx CAN LogiCORE IP System Requirements Schedule for details on System Requirements for the CAN LogiCORE.

To perform a Simulation Only Evaluation:

• Make sure you have satisfied the requirements listed in the section above.
• Follow the Installation Instructions in the CAN LogiCORE IP v1.4 Release Notes and Known Issues Answer Record to install the archive onto your Xilinx ISE™ 8.2i SP2 software installation.
• To access the core:
  • Double-click on the"Automotive & Industrial" folder in the left hand panel of the CORE Generator GUI, then double-click on the "Automotive" folder and click on "CAN". The CAN LogiCORE IP Core summary panel will appear in the right hand panel of the CORE Generator GUI.
  • Double-click on the CAN LogiCORE IP entry in the left hand catalog panel, or single click on the "Customize" link in the right hand panel to call up the CAN LogiCORE IP customization GUI.
  • Select the desired options for the core, then click on the Generate button.
• The following support files will be generated in your CORE Generator project directory:
  • .NGC implementation netlist
  • .veo or .vho file (Verilog or VHDL instantiation template)
  • .XCO log file
• The following support files are written to a subdirectory named <user_specified_corename> located within the project directory:
  • Release Notes: <user_corename>_release_notes.txt
  • Supporting documentation
  • Subdirectories containing example wrapper files
  • Scripts to simulate the core using the Mentor ModelSIM simulator

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• Make sure you have satisfied the requirements listed in the Requirements section above.
• Follow the Installation Instructions in the ISE 8.2i IP Update 2 Release Notes and Known Issues Answer Record to install the archive onto your Xilinx ISE 8.2i software installation
  
  

Contact your local Xilinx Sales Office to request a Full System Hardware Evaluation License key from your local FAE. Once you receive the key, install it as directed by the instructions in the email you will receive.

• Start up the CORE Generator using either of the following two methods:
  • From ISE: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
  • From Windows: Select Programs -> Xilinx ISE 8.2i -> Accessories -> CORE Generator
• To access the core:
  • Double-click on the "Automotive & Industrial" folder in the left hand panel of the CORE Generator GUI, then double-click on the "Automotive" folder and click on "CAN LogiCORE". The CAN LogiCORE IP summary panel will appear in the right hand panel of the CORE Generator GUI.
  • Double-click on the CAN LogiCORE IP entry n the left hand catalog panel, or single click on the "Customize" link in the right hand panel to call up the CAN LogiCORE IP customization GUI.
• Select the desired options for the core, clicking on Next to proceed to each panel. When all options have been selected, click on the Finish button.
• The following support files will be generated in your CORE Generator project directory:
  • .NGC implementation netlist
  • .VEO or .VHO file (Verilog or VHDL instantiation template)
  • .VHD or .V structural Unisim simuilation model
  • .XCO log file
• The following support files are written to a subdirectory named <user_specified_corename> located within the project directory:
  • Release Notes: <user_corename>_release_notes.txt
  • Supporting documentation
  • Subdirectories containing example wrapper files
  • Scripts to run the core through the ISE tools (NgdBuild, Map, PAR) and to simulate the core using the Mentor ModelSIM simulator

Please follow the instructions in the Getting Started Guide. This document is also written out to the current CORE Generator project directory and contains specific instructions on which files to use in instantiating the core.

Known Issues are documented in the CAN LogiCORE v1.4 Release Notes and Known Issues Answer Record.

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You can learn more about the Xilinx CAN LogiCORE IP by visiting the CAN LogiCORE IP product page.

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