Xilinx provides two ways to evaluate the FlexRay Controller LogiCORE™ IP product: Simulation Only, and Full System Hardware Evaluation.

• Simulation Only Evaluation allows you to customize the core through a CORE Generator customization GUI and generate a Unisim Library-based structural model for functional simulation.
• A Full System Hardware Evaluation version of the core allows you to do everything you can do with the Fully Licensed IP core, including configure place and route, simulate, estimate timing and program a Xilinx FPGA device.

• Please refer to the Xilinx FlexRay Controller Solution Offerings and System Requirements Schedule for details on System Requirements for this core.

To perform a Simulation Only Evaluation:

• Make sure you have satisfied the requirements listed in the section above.
• Follow the Installation Instructions in the ISE™ 9.1i IP Update 3 Release Notes and Known Issues Answer Record to install the archive onto your Xilinx ISE 9.1i software installation
• Follow the General Instructions to access and evaluate the core.

To perform a Full System Hardware Evaluation: The procedures are the same as for the Simulation Only Evaluation, except that you must additionally request and install a Full System Hardware Evaluation license. This will allow you to generate a bitstream that you can use to program a Xilinx FPGA and evaluate the core in hardware for a limited amount of time.

• Make sure you have satisfied the requirements listed in the Requirements section above.
• Follow the Installation Instructions in the ISE 9.1i IP Update 3 Release Notes and Known Issues Answer Record to install the archive onto your Xilinx ISE 9.1i software installation
  
• Use this form to Generate a Full System Hardware Evaluation License Key and follow the emailed instrucions to install the key on your machine.
• Follow the General Instructions to access and evaluate the core.

• Start up the CORE Generator using either of the following two methods:
  • From ISE: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
  • From Windows: Select Programs -> Xilinx ISE 9.1i -> Accessories -> CORE Generator
• To access the core:
  • Double-click on the "Automotive & Industrial" folder in the left hand panel of the CORE Generator GUI
  • Double-click on the "Automotive" folder, and click on "FlexRay". The selected Core will appear in the right hand panel of the CORE Generator GUI.
  • Double-click on the FlexRay entry in the left hand catalog panel, or single click on the "Customize" link in the right hand panel to call up the FlexRay IP customization GUI.
• Select the desired options for the core, clicking on Next to proceed to the next panel. When all options have been selected, click on the Finish button.
• The following support files will be generated in your CORE Generator project directory:
  • .NGC implementation netlist
  • .VEO or .VHO file (Verilog or VHDL instantiation template)
  • .VHD or .V structural Unisim simuilation model
  • .XCO log file
• The following support files are written to a subdirectory named <user_specified_corename> located within the project directory:
  • Release Notes: <user_corename>_release_notes.txt
  • Supporting documentation
  • Subdirectories containing example wrapper files
  • Scripts to run the core through the ISE tools (NgdBuild, Map, PAR) and to simulate the core using the Mentor ModelSIM simulator

Please follow the instructions in the Getting Started Guide. This document is also written out to the current CORE Generator project directory for the core and contains specific instructions on which files to use in instantiating the core.

You can learn more about the Xilinx FlexRay LogiCORE by visiting the FlexRay Controller product page.