Impulse
Automatic application analysis and accelerator generation
Mimosys Clarity is a software tool that automatically identifies hardware accelerators directly from C source code.
This unique automation technology is accompanied by rich graphical representations of key aspects of the
application C source to enable the user to understand where and how acceleration is achieved and specialise them if
desired. Additionally it automates the generation of the HDL and integration of the application software. Clarity
enables the user with little or no knowledge of an application or hardware to quickly produce accelerated
applications on Xilinx hardware.
Below are more facts about Mimosys:
Technology Brief
Overview of the technology
- The Mimosys Clarity tool is an analysis and
design-assistance tool to greatly facilitate the hareware/software partitioning,
design and implementation of an application for a PowerPC™ using
accelerators in FPGA.
- The tool provides pertinent information about the process
at all times using intuitive graphical displays, increasing the
productivity of the designer while allowing him to retain full control
over the final design.
- Once the accelerators are selected, Clarity automates the
implementation process, generating a Xilinx Platform Studio project
that can be immediately synthesized and downloaded to an FPGA.
- Using Clarity can shorten design times significantly.
History of the company and origins of the technology
- Mimosys is a spin-out from the Swiss Institute of Technology, Lausanne (EPFL).
The technology has received several best paper awards and best papers
nominations in leading conferences around the world.
Details
Which languages are supported?
- Standard ANSI C is supported. No new languages or extensions to learn
- Many GNU C extensions are supported
- C++ support will be available soon
- Accelerators are output in VHDL, Verilog coming soon
How is acceleration achieved?
- Clarity will statically analyze the application to display
its structure.
- A dynamic analysis via custom profiling will enhance the
display with details about execution paths.
- The Clarity accelerator search algorithm will identify and represent the
best accelerators to the designer, showing clearly where the
performance gains come from.
- The proposed accelerators can be modified and deleted.
Furthermore, the designer can create entirely new ones in an intuitive
and graphical way.
- Finally, a project containing the modified application
source code and the hardware descriptions for the accelerators is
automatically created, requiring no knowledge of the Xilinx PowerPC APU
interface.
What is the environment like?
- The Mimosys Clarity tool is entirely integrated in the
Eclipse development environment, so previous users will feel right at
home. The Xilinx SDK is also based on Eclipse.
Is floating point operation supported?
- No, Clarity supports only integer and fixed point
representations at the moment.
Are standalone function libraries available?
- No function libraries are needed, as the entire source code
will be analyzed for acceleration opportunities. Pre-compiled libraries
without the source code are supported, but will not be accelerated.
What format is the output?
- The application source code is modified to comment out the
parts that have been moved into hardware. Calls to the accelerators are
inserted, as well as Xilinx-specific headers and PowerPC initialization
code.
- The accelerators and the required control and interfacing
logic are output as an
IP-block in standard RTL (VHDL) for XST synthesis. They are further
encapsulated as a Xilinx Platform Studio (XPS) project, which can be
modified or synthesized as is.
Quality of results / Optimization scenarios
- The accelerators proposed by the search algorithm are
optimal under constraints: no superior accelerators exist without
rewriting parts of the application or modifying the constraints.
- Optimizations such as predication are automatically used to
increase the size and performance of the accelerators.
- If the application already has explicit parallelism, the
proposed accelerators can be implemented without modifications. If not,
Clarity guides the designer to the hotspots that need to be rewritten.
- The accelerators found are implemented as custom
instructions using the PowerPC APU interface.
Simulation and debugging flows
- Clarity provides C models of the accelerators for quick
simulation in software.
- Full HDL simulation can be performed from within the Xilinx
Platform Studio like any other design.
- The generated HDL is correct by construction, including all
quirks of the C language.
- However, the functional equivalence between the original C
source code and the generated HDL can be verified by running an HDL
simulation script (for Modelsim) using random inputs.
What is the learning curve?
- A software engineer will need about one hour to learn how
to use the Eclipse IDE.
- Any engineer will then need less than 30 minutes to learn
how to use the Clarity tool.
- No knowledge of the PowerPC APU interface, or even VHDL, is
required.
Skill pre-requisite
- Some understanding and experience of C is required.
- Using the Clarity tool does not
require any circuit design experience or knowledge of Verilog/VHDL.
Suitability and Fit
Who is the target audience?
- Application engineers developing applications for
embedded microprocessors in the Virtex™-4
Which applications segments are targeted by this product?
- Embedded applications such as multimedia, telecoms,
networking, imaging, cryptography, and so on.
Main value proposition?
- Increased performance or reduce power consumption compared
to software-only application
- Greatly reduced time to market compared with manual
accelerators
- FPGA accelerators are made accessible to software
developers without any Verilog/VHDL or other circuit design skills
- Fully portable code between FPGA generations and systems
Language and methodology limitations
- Mimosys Clarity is an application analysis and accelerator
generation tool that sits above hardware design. It is not a hardware
design tool-chain and does not enable
rapid circuit design.
Pricing
Xilinx Integration
Which Xilinx devices/architectures are supported?
Which Xilinx boards are supported?
- Any board with one or more Virtex-4 FX FPGAs
Which Xilinx CPUs are supported?
- PowerPC, MicroBlaze™ soon
Inference of Xilinx Library components
- No components are directly instantiated by Clarity, but
they can be added by the designer without problems
Flow integration with EDK/XPS, ISE, System Generator (Implementation)
- Mimosys Clarity generates a project that can be opened by
Xilinx XPS. Once in the XPS
environment, the standard Xilinx flow is used.
- Xilinx ISE™ and EDK need to be installed.
Flow integration with EDK/XPS, ISE, System Generator (Simulation)
- C functional simulation is available inside the Clarity
environment. Full system simulation is provided by XPS
How much Xilinx expertise is needed to get a design from concept to final implementation?
- No Xilinx expertise is needed to get a design from concept
to final implementation
Getting Started
How to get started
- Mimosys Clarity works out of the box on any boards with one
or more Virtex-4 -FX FPGAs
Design examples for various Xilinx boards
- ADPCM example for Xilinx ML403 demo board
Request for evaluation
- Contact sales@mimosys.com to request an evaluation version or call our EU office: +44 20 78 70 77
82
Sales kits available?
(i.e. bundling of boards, software, examples for an integration out of the box experience)
Design services / consultancy available?
How to get design services
|
