Mirabilis Design
Architecture Exploration of the FPGA and multi-FPGA system
Mirabilis Design Inc. has joined the Xilinx ESL initiative to provide FPGA designers with architectural exploration solutions for feasibility studies and virtual prototyping of FPGAs and multi-FPGA systems. To this end, the company also announced immediate availability of the new VisualSim Xilinx FPGA Modeling Toolkit that enables quick prototypes of new and derivative systems using parameterized models of FPGA platforms. With this virtual prototype, designers can select the right architecture by conducting rapid and extensive performance trade-offs during the product definition phase.
Product Details
If you would like to:
- Know the end-to-end response time for an application implemented on the FPGA
- Create a virtual prototype of the FPGA-based system before development
- Have a reference model to validate implementation and for early software design
- Optimally size your system resources to meet customer requirements
- Identify any potential processor or I/O bottlenecks
Then you must look at VisualSim Xilinx FPGA Toolkit from Mirabilis Design.
To learn more about the technology, methodology, benefits and the application of this Toolkit, read the recent article (PDF) in Xilinx XCell Journal.
Below are more facts about Mirabilis Design:
Technology Brief
Overview of the Technology
The product is built on top of the industry-standard VisualSim Architect. The FPGA Toolkit can be used in conjunction with the application-specific, processing functions, resource and architecture elements available in VisualSim. The modeling components provided in the FPGA library have been configured to represent the IP, cores and Fabric resources. This includes the parameters, list of standard statistics output and possible connectivity options. A list of the important toolkit components are:
- Processors/Cores (PowerPC® and MicroBlaze™)
- Bus and Controllers (CoreConnect-PLB and OPB, Fast Simplex Link Bus, DDR and DMA)
- Memory (SDRAM, SRAM, Block RAM and Cache)
- Communication Devices (Ethernet, PCI® and PCI-Express®)
VisualSim Xilinx FPGA Modeling Toolkit provides a virtual prototyping environment for performance analysis, architecture exploration and power optimization. This Modeling Toolkit works on the VisualSim Architect modeling and simulation environment. VisualSim Architect is a comprehensive environment for engineers to conduct performance, power and architecture exploration on the proposed system using a set of parameterized modeling components in a graphical block diagram editor. Within VisualSim Architect, designers can select the right architecture by conducting rapid and extensive performance trade-offs during the product definition phase.
Using the Xilinx FPGA Modeling Toolkit, VisualSim Architect can be used to study a variety of architecture trade-off including:
System
- Optimal distribution of application, control and protocols between board-level components and FPGA
- Select the right FPGA platform and combination of IP/Cores for the target application
- Migrating external Processor to on-chip PowerPC
Hardware
- Partitioning the application or protocol between the PowerPC, MicroBlaze and Fabric
- Sizing processors, memory, buses and other active resources on- and off- the FPGA
- Determine the utilization and effective throughput across the CoreConnect (PLB and OPB), FSL Bus, DMA and memory controllers
- Allocate block RAMs to operational task for low-latency and minimal DMA overhead
- Effects of redundancy and radiation hardening on system availability
Software
- Offloading processes on to Co-Processors using the APC or a separate dedicated FPGA
- Load balancing software tasks onto multiple PowerPC or MicroBlaze
- Performance and stalling effects of parallel and concurrent software operation
- Test for functional and software flow correctness
History of the Company and Origins of the Technology
- Mirabilis Design provides performance analysis and architecture exploration software for the design of high-performance and high-availability electronics and software. Using VisualSim, designers can architect the “right” product, i.e. one which minimizes product failures and has not been over- or under- designed. Mirabilis Design accelerates Concept Engineering by drastically reducing typical model development from months to days and overall project time by 25-30%. Benefits from the solution are a visual executable specification; easier creation of optimized and differentiated products and; corporate infrastructure enabling extremely fast design trade-offs for price, performance and power.
Current approaches to architecture exploration are done using spreadsheets, writing large-scale C models or designer’s experience. The first approach is very deterministic and cannot capture the traffic profiles, blocking activity and dependencies between resources. The second can be very accurate but takes an extremely long time, which typically exceeds the allocated time schedule. The third approach is based on knowledge of the current system which can vary significantly from the proposed system.
Details
Which languages are supported?
- Block-based model entry and analysis
- Statement language entry in graphical template
- MatLab-like Regular Expression Language- User-extendable
- SmartMachine- Modeling-specific scripting language
- Standard ANSI C/C++/Java are supported. No new languages or extensions to learn
- Verilog/VHDL
- Python
How is acceleration achieved?
VisualSim from Mirabilis Design is the first solution that provides parameterized building blocks to construct simulation models for both custom and standard systems. These models can be constructed in a few days and require almost no implementation knowledge or information. Architecture exploration and validation using VisualSim starts during the project scheduling and planning phase. The models constructed in VisualSim are carried through out the design process to review impact of changes to requirements, implementation validation and as a specification communication platform.
What is the environment like?
VisualSim Xilinx FPGA Modeling Toolkit is an entirely graphical environment where the model construction, simulation, analysis and communication refinement are performed using a series of building blocks and a Editor menu buttons.
The Xilinx FPGA Modeling Toolkit provides modeling blocks that emulate the standard FPGA Platforms and IP/Cores. These include processors, DMA, memory, buses and controllers. Using these components, a designer can capture a model of the proposed architecture using the Xilinx Virtex platforms. The model can at the FPGA-level of a system containing one or more FPGAs. The model can contain the details of both the hardware and software architecture.
This library has been built to enable designers to quickly put a prototype of their proposed system and simulate with various combinations of applications and traffic profiles.
Is floating point operation supported?
- Floating and fixed point operations are supported.
Are standalone function libraries available?
- VisualSim provides a large number of modeling libraries. These are models of components that existing both on the FPGA and peripherals that are connected on the system board.
What format is the output?
- VisualSim can output the analysis results in a dynamic real-time plotter, or to a text or XML file for offline viewing.
Quality of results / Optimization scenarios
- VisualSim simulation accuracy can range from 65% to over 90% depending on the level of detail provided in the model. There is a trade-off in modeling complexity vs. analysis performed. Optimization scenarios can pin-point exact problems areas, bottlenecks, refinement opportunity and overall availability of the product specification
Simulation and debugging flows
VisualSim supports extensive graphical debugging. Traditional code-level debugging focuses on print statement, breakpoints and step-by-step operation to identify errors in the code logic or incorrect operation. VisualSim provides listeners, animation and assertions to identify errors at the model or the system-level. This approach enables designers to focus on making sure the architecture is correct and the flows are accurate.
VisualSim also co-simulates with Verilog, SystemC, VHDL and C/C++. This interface can be used for functional, timing, direct and random testing of the implementation.
Abstractions and Level of Details Supported
VisualSim can support the definition of different components in a single model to be at different levels of abstractions. The levels of abstractions supported include:
- Performance or Queuing or Traffic models
- Cycle-accurate or Transaction-level
- Bit-accurate
- Functional
- Platform-driven and instruction-accurate
What is the learning curve?
Mirabilis Design provides a standard 2-day training session. During this period, attendees construct a model of a system that they are familiar with. This becomes the foundation of further development.
Most customers are productive within 2 weeks following this training and conducting complex analysis.
Skill pre-requisite
- Knowledge of the proposed application and the application functional flow is the only requirement.
Suitability and Fit
Who is the target audience?
- The Xilinx FPGA Toolkit is intended to be used by engineers that need to implement complex protocols, processing intensive application and controllers on FPGAs. The simulation can study how the FPGA will perform when different application sequence or user-input is provided. Also, the interaction between multiple FPGAs, ASIC-FPGA, and system components and FPGA can be studied. This Toolkit can be used throughput the product development process. Major design phases include early hardware and software architecture design phase; changes made to the architecture due to the requirements changing; implementation verification; and product testing.
Which applications segments are targeted by this product?
- Target audience is engineers developing high-performance and high-availability system design. These customers can be in any application market and can be constructing any variety of end-products. If the application has non-deterministic traffic profiles or there are multiple shared resources, then early architecture exploration will provide valuable insight into the system operations, performance and power consumption.
- A number of large corporations and startup companies are using VisualSim. Applications areas include avionics and satellite systems, Printers, Networking equipment, storage systems, high-speed serial interfaces and computer servers.
Main value proposition?
- VisualSim FPGA Toolkit can identify design bottlenecks, gain greater coverage of the exploration over spreadsheets and validate your architecture prior to implementation. Using VisualSim means that Architects and Designers do not have to make simplistic assumptions using spreadsheets or spend a lot of time developing detailed C models. They can get the detailed results and accuracy of a cycle-accurate and message accurate C-model using a model that can be controlled using a spreadsheet. Architecture exploration, prior to implementation, will guarantee that your design will work the first, meet the customer requirements and can be manufactured without significant problems. All of these ensure that you have the highest quality product, at the optimal price, required performance and lowest possible power consumption.
Language and methodology limitations
- VisualSim Xilinx FPGA Toolkit can be used to simulate the entire system including the FPGA, Processors and ASIC. This can be at the abstract or performance level, as well as the cycle-approximate.
Pricing
- VisualSim is priced for rapid adoption at startups and large corporations. There is a base price for the VisualSim Architect, which is a pre-requisite. There are three add-on libraries required to get all the required modeling toolkits to have a complete system modeling platform
Xilinx Integration
Which Xilinx devices/architectures are supported?
- Virtex™-II
- Virtex-II Pro
- Virtex-4
- Virtex-5
Which Xilinx boards are supported?
- Any board with one or more of the above Virtex FPGAs
Which Xilinx CPUs are supported?
- PowerPC (e405 and e603 cores). Supports dual- and single-core configurations
MicroBlaze. Supports daisy chained and parallel connectivity
Inference of Xilinx Library components
- Cache: L2 and off-chip cache
- Memory: Block RAM, SDRAM, SRAM and Flash
- Controllers: DMA, I/O, Memory (DDR, RDR and SDR)
- Bus: CoreConnect (PLB and OPB), FSL-Bus, PCI, PCI-X and PCI-Express
- Communication Devices: Ethernet
Flow integration with EDK/XPS, ISE, System Generator (Implementation)
Flow integration with EDK/XPS, ISE, System Generator (Simulation)
- Full system and C functional simulation is available inside the VisualSim environment
How much Xilinx expertise is needed to get a design from concept to final implementation?
- No Xilinx expertise is needed to get a design from concept to final implementation
Getting Started
How to get started
- Contact Mirabilis Design to get an evaluation copy of the VisualSim software. Mirabilis Design offers a 3 week evaluation license
Design examples for various Xilinx boards
- Over 300 design examples in a variety of applications areas are available in VisualSim package
Request for evaluation
Sales kits available?
(i.e. bundling of boards, software, examples for an integration out of the box experience)
Design services / consultancy available?
How to get design services
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