CPRI

製品の詳細

• Ask Xilinx About this Core

資料

• リリース ノート (PDF)
• CPRI
• ザイリンクス コアのサイト ライセンス (PDF)

サポートするデバイス

• Virtex-6 -1L
• Virtex-6 LXT
• Virtex-6 SXT
• Virtex-5 FXT
• Virtex-5 LXT
• Virtex-5 SXT

The LogiCORE™ CPRI IP core is a high-performance IP core solution that implements the Common Packet Radio Interface (CPRI). The IP core uses state-of-the-art RocketIO™ GTP/GTX transceivers to implement the CPRI Physical Layer and provides a compact and customizable Data Link Layer implemented in the FPGA fabric. The CPRI core is ideal for connectivity between Radio Equipment Controllers (REC) or base stations and one or more Radio Equipment units. It provides an optimized implementation offering radio I/Q data, radio unit management, and synchronization in a single efficient protocol.

主要機能

• Designed to CPRI Specification v4.0
• Operates at line rates of 614.4 Mbps, 1228.8 Mbps and 2457.6 Mbps using Xilinx GTP transceivers
• Operates at line rates of 1228.8 Mbps, 2457.6, 3.072 Mbps using Xilinx GTX transceivers
• Automatic speed negotiation
• Configurable as master or slave
• Suitable for use in both Radio Equipment, Controllers (RECs) and Radio Equipment (RE)
• Supports 1 to 24 Antenna-Carriers per core
• Available through the Xilinx CORE Generator