Class Schedule By State
Schedule updated September 3, 2008
Dates are subject to change. Contact your local training representative with any questions.
Registration (requires login)
Xilinx trademarks
- PlanAhead™ software
- LogiCORE™ IP
- Virtex®-5 family
- AccelDSP™ synthesis tool
| Alberta |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Arizona |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| California (Northern) |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Introduction to Verilog |
9/9/08-9/11/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| Fundamentals of FPGA Design |
9/16/08-9/16/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Designing for Performance |
9/17/08-9/18/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| DSP Design Using System Generator |
9/23/08-9/24/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Designing with Multi-Gigabit Serial I/O |
9/25/08-9/26/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Advanced FPGA Implementation |
9/30/08-10/1/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
10/2/08-10/3/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Fundamentals of FPGA Design |
10/7/08-10/7/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Designing for Performance |
10/8/08-10/9/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| VHDL: Introduction to VHDL |
10/14/08-10/16/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| VHDL: Advanced VHDL (v8) |
10/23/08-10/24/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Advanced FPGA Implementation |
10/29/08-10/30/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Introduction to Verilog |
11/3/08-11/5/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| Designing with PlanAhead |
11/11/08-11/12/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Embedded Systems Development |
11/11/08-11/12/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| DSP Design Using System Generator |
11/13/08-11/14/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Minimizing Your Design Time with the ChipScope Pro Debug and Verification Tools |
12/3/08-12/3/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
12/4/08-12/5/08 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| California (Southern) |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Fundamentals of FPGA Design (v9) |
9/15/08-9/15/08 |
Holiday Inn - Costa Mesa Orange Co. Airport |
500 |
5 |
Register |
| Designing for Performance (v9) |
9/16/08-9/17/08 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,000 |
10 |
Register |
| Fundamentals of FPGA Design (v9) |
9/18/08-9/19/08 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,000 |
10 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| District Of Columbia |
| For this location, please visit our ATP site for the complete class schedule: Bottom Line Technologies |
| Massachusetts |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Embedded Open-Source Linux Development |
9/9/08-9/10/08 |
Genesis Associates - Burlington, MA |
1,200 |
12 |
Register |
| Fundamentals of FPGA Design (v9) |
11/18/08-11/18/08 |
Genesis Associates - Burlington, MA |
500 |
5 |
Register |
| Designing for Performance |
11/19/08-11/20/08 |
Genesis Associates - Burlington, MA |
1,000 |
10 |
Register |
| Embedded Systems Development |
12/9/08-12/10/08 |
Genesis Associates - Burlington, MA |
1,200 |
12 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Manitoba, Canada |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Maryland |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Embedded Systems Development |
9/9/08-9/10/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1399 |
12 |
Register |
| Fundamentals of FPGA Design |
9/23/08-9/23/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
699 |
5 |
Register |
| Designing for Performance |
9/24/08-9/25/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
10 |
Register |
| DSP Design Using System Generator |
9/30/08-10/1/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
12 |
Register |
| Introduction to AccelDSP |
10/2/08-10/3/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
10 |
Register |
| Designing with PlanAhead |
10/13/08-10/14/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,400 |
10 |
Register |
| DSP Implementation Techniques for Xilinx FPGAs (v8) |
10/15/08-10/17/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
2,100 |
18 |
Register |
| Introduction to VHDL |
10/22/08-10/24/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,799 |
15 |
Register |
| Advanced FPGA Implementation |
11/11/08-11/12/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
10 |
Register |
| Advanced VHDL |
11/13/08-11/14/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
10 |
Register |
| Designing with Multi-Gigabit Serial I/O |
11/18/08-11/19/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
10 |
Register |
| Designing a LogiCORE PCI Express System |
11/20/08-11/21/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,399 |
10 |
Register |
| Designing with PlanAhead |
12/2/08-12/3/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
699 |
5 |
Register |
| Minimizing Your Design Time with the ChipScope Pro Debug and Verification Tools |
12/4/08-12/4/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
700 |
5 |
Register |
| Embedded Systems Development |
12/9/08-12/10/08 |
Genesis Mid-Atlantic - Columbia, MD - USA (14) |
1,400 |
12 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Bottom Line Technologies |
| Maine |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Nevada |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| New Hampshire |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| New Mexico |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| New York |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| DSP Implementation Techniques for Xilinx FPGAs (v8) |
9/16/08-9/18/08 |
Watermark Executive Suites - Las Vegas |
2,100 |
18 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Bottom Line Technologies |
| Ontario, Canada |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Minimizing Your Design Time with the ChipScope Pro Debug and Verification Tools |
9/3/08-9/3/08 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
600 |
6 |
Register |
| Fundamentals of FPGA Design (v9) |
9/23/08-9/23/08 |
Electro-Source - Rexdale (Toronto), CAN |
500 |
5 |
Register |
| Designing for Performance |
9/24/08-9/25/08 |
Electro-Source - Rexdale (Toronto), CAN |
1,000 |
10 |
Register |
| Designing with PlanAhead |
10/21/08-10/22/08 |
Electro-Source - Rexdale (Toronto), CAN |
1,000 |
10 |
Register |
| VHDL: Advanced VHDL (v8) |
10/28/08-10/29/08 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,000 |
10 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
11/11/08-11/12/08 |
Electro-Source - Rexdale (Toronto), CAN |
1,200 |
12 |
Register |
| Designing with PlanAhead |
11/25/08-11/26/08 |
Electro-Source - Rexdale (Toronto), CAN |
1,000 |
10 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Pennsylvania |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Fundamentals of FPGA Design |
10/6/08-10/6/08 |
Check with ATP |
699 |
5 |
Register |
| Designing for Performance |
10/7/08-10/8/08 |
Check with ATP |
1,399 |
10 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Bottom Line Technologies |
| Quebec, Canada |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Advanced VHDL |
10/7/08-10/08/08 |
Hardent - Montreal, Quebec, CAN |
1,000 |
10 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Rhode Island |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Saskatchwan, Canada |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Texas |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Fundamentals of FPGA Design |
9/16/08-9/16/08 |
Xilinx Learning Center - Dallas, TX , USA (20) |
500 |
5 |
Register |
| Designing for Performance |
9/17/08-9/18/08 |
Xilinx Learning Center - Dallas, TX , USA (20) |
1,000 |
10 |
Register |
| Advanced FPGA Implementation |
9/23/08-9/24/08 |
Xilinx Learning Center - Dallas, TX , USA (20) |
1,000 |
10 |
Register |
| Embedded Systems Development |
10/7/08-10/8/08 |
Xilinx Learning Center - Dallas, TX , USA (20) |
1,200 |
12 |
Register |
| VERILOG: Introduction to Verilog (v9) |
10/7/08-10/9/08 |
Xilinx Learning Center - Dallas, TX , USA (20) |
1,500 |
15 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
10/14/08-10/15/08 |
Xilinx Learning Center - Dallas, TX , USA (20) |
1,200 |
12 |
Register |
| Vermont |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
|