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Advanced Embedded System Design on Zynq using ISE

Course Description This course provides participants the necessary skills to develop complex embedded systems and enable them to improve their designs by using the tools available in the Embedded Development Kit (EDK). It also helps developers understand and utilize advanced components of embedded systems design for architecting a complex system in the Zynq™ All Programmable System on a Chip (SoC). 
Level Intermediate
Duration 2 Days
Who should attend? Professors who are familiar with embedded system design and want to explore hardware-software partitioning using Xilinx SoC in Zynq.
Pre-requisites
  • Digital logic and FPGA design experience
  • Experience with Xilinx ISE® Foundation™ software
  • Experience with Embedded System design
  • Have attended XUP Embedded System Design workshop or has equivalent experience

Skills Gained

After completing this workshop, you will be able to:

  • Assemble an advanced embedded system
  • Explore various features of Zynq AP Soc for hardware-software co-design
  • Design and integrate peripherals using interrupts
  • Analyze system performance
  • Utilize hardware debugging technique
  • Design a bootable system ready for deployment in field

Course Overview

Day 1:

  • Review of EDK Design Flow on Zynq
  • Lab 1: Create a SoC-Based System using Programmable Logic
    • Create a complete processor system with built-in processor and IP in programmable logic.
  • Advanced Zynq Architecture
  • Hardware Debugging using ChipScope
  • Lab 2: Debugging using ChipScope cores
    • Insert various ChipScope cores to debug/analyze system behavior.
  • Memory Interfacing
  • Lab 3: Extending Memory Space with Block RAM
    • Instantiate AXI BRAM controller and BRAM to extend address space and run application from it.

Day 2:

  • Interrupts
  • Low Latency High Bandwidth
  • Lab 4: Direct Memory Access using CDMA
    • Perform DMA operations between various memories using AXI CDMA controller in polling and interrupt modes.
  • Processor Configuration and Bootloader
  • Lab 5: Configuration and Booting
    • Create images to boot off the SD card and QSPI flash. Load previously generated hardware bitstreams and executables, and execute desired application.
  • Profiling and Performance Improvement
  • Lab 6: Profiling and Performance Tuning
    • Profile an application performing a function both in software and hardware.
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