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        SDSoC Development Environment Estimation & Implementation

        Part 1 of 2 of an introduction to the SDSoC™ Development Environment. This video reviews the challenges in implementing a system in a Zynq® SoC device and how SDSoC helps resolve those challenges. Then show a demo of SDSoC on an example design to generate performance estimate and run a full design implementation using those estimates, and verifying the results achieved on the evaluation board.

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        SDSoC Development Environment Demo

        In this video, we will see how to create a simple image processing pipeline to detect motion, and to insert motion-edges into a live HD 1080p video stream running at 60 frames per second.

        SDSoC Development Environment Optimization & Debug

        Part 2 of 2 of introduction to SDSoC™ Development Environment: This video reviews implementation challenges and how SDSoC helps solve those challenges, take a fully implemented design and modify it to further optimize the accelerated functions. Then see how SDSoC enables interactive debug on an implemented design running on an evaluation board.

        SDSoC: Developing a full system in C/C++ without writing a single line of hardware code

        Accelerating OpenCV functions in hardware using only C/C++ and hardware optimized libraries with SDSoC development environment

        Region of Interest (ROI) based encoding demo: Software Architecture

        Learn about the details of the software architecture of the Zynq UltraScale+ MPSoC Video Codec Unit (VCU) Region of Interest (ROI) based encoding reference design. The Xilinx video and connectivity IP support stack is introduced. Then, the software stack for the VCU ROI application is described, with details on the Gstreamer stream-out pipeline, and the ROI GStreamer plug-in. Then, the Gstreamer stream-in pipeline is described. To conclude, resources are presented for getting started with the reference design.

        Maximizing broadcast bandwidth: Region of Interest based encoding

        Learn how Region of Interest (ROI) based encoding, implemented with the Zynq UltraScale+ MPSoC Video Codec Unit (VCU), can be used to maximize broadcast bandwidth. The broadcast bandwidth problem is described. Region of Interest based encoding is presented as a potential solution, using the Xilinx Video Codec Unit. The Zynq UltraScale+ MPSoC VCU ROI reference design is introduced. A demonstration of VCU ROI encoding on the Xilinx ZCU106 evaluation board is shown. To conclude, resources are presented for getting started with the reference design.