Performance and Resource Utilization for I2S Receiver v1.0

Vivado Design Suite Release 2022.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_NUM_CHANNELS
C_DWIDTH
C_DEPTH
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 2 test_zuplus_wMASTER_w2CH_w16DW_1024Depth 2 16 1024 m_axis_aud_aclk=100 s_axi_ctrl_aclk=100 aud_mclk 738 475 1722 0 1 0 PRODUCTION 1.30 05-15-2022
xczu9eg ffvb1156 2 test_zuplus_wMASTER_w2CH_w16DW_64Depth 2 16 64 m_axis_aud_aclk=100 s_axi_ctrl_aclk=100 aud_mclk 738 433 1670 0 0 1 PRODUCTION 1.30 05-15-2022
xczu9eg ffvb1156 2 test_zuplus_wMASTER_w2CH_w24DW_1024Depth 2 24 1024 m_axis_aud_aclk=100 s_axi_ctrl_aclk=100 aud_mclk 725 504 1770 0 1 0 PRODUCTION 1.30 05-15-2022
xczu9eg ffvb1156 2 test_zuplus_wMASTER_w8CH_w24DW_1024Depth 8 24 1024 m_axis_aud_aclk=100 s_axi_ctrl_aclk=100 aud_mclk 725 964 2184 0 1 0 PRODUCTION 1.30 05-15-2022

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