Vitis Embedded Platforms

The Vitis™ unified software platform provides product developers an environment for creating embedded software and accelerated applications on heterogeneous platforms based on FPGAs, Zynq®-7000 SoCs, and Zynq® UltraScale+™ MPSoCs. This document focuses on embedded platform creation for Zynq UltraScale+ MPSoC.

Although the Vitis target platforms can be customized with unique hardware and software components, there are two general types of platforms. The first type of platform is a direct analog to the hardware definition file that was previously used for software development with the Xilinx® SDK tool. The second type of platform is one that includes hardware for supporting acceleration kernels and software for a target running Linux and the Xilinx Runtime (XRT) library. For more information on the XRT library, see https://github.com/Xilinx/XRT.

The following figure shows the pre-2019.2 SDK flow for embedded software application development. A hardware definition file (HDF) is exported from the Vivado® Design Suite and used by SDK for board support package (BSP) generation and creating software applications that apply the BSP.

Figure 1: SDK Flow

The following figure shows the Vitis embedded software development flow that supersedes SDK from 2019.2 onwards. The hardware specification is now referred to as the Xilinx Shell Archive (XSA) and is exported from a Vivado design but is formatted differently and has a .xsa filename extension. The Vitis core tools automatically create a platform, BSP, and software boot components such as the FSBL and PMU firmware for this type of XSA and are associated with the platform. Software applications targeting the platform can then be developed with the Vitis core tools and do not require Linux and the XRT library. See the Vitis Accelerated Flow in the Vitis Unified Software Platform Documentation (UG1416) for more information.

Figure 2: Vitis Embedded Software Development Flow

For product developers who want to accelerate their applications, platforms with hardware and software components that support acceleration kernels can be created with the Vitis core tools. The Vivado Design Suite is used to generate and write a second type of XSA containing a few additional IP blocks and metadata to support kernel connectivity. The following figure shows the acceleration kernel application development flow.

Figure 3: Vitis Acceleration Kernel Flow

The Vitis core tool supports application development in multiple languages (OpenCL™, C, C++) but the applications must target a Vitis target platform. A target platform consists of hardware and software components as shown in the following figure. The target platform view on the left side of the page is for the Vitis embedded software development flow, whereas the right side of page shows a platform that supports acceleration kernels. The differences are highlighted in bold font and include acceleration kernel requirements of a target with Linux + XRT, metadata, and kernel interface declarations.

Figure 4: Vitis Target Platforms

Through the target platform project creation flow, Vitis developers assemble the hardware and software components to generate a target platform. Before the components can be integrated, the hardware must be created with the Vivado Design Suite and the Linux software created with the PetaLinux tools or other Linux development tools that generate the same Linux output products as the PetaLinux tools. This section describes how to use Vivado to create the hardware and necessary metadata. Then, the PetaLinux flow is presented to create a Linux software image containing the XRT library. After the hardware and software components have been produced, the following figure shows the Vitis target platform project flow in an embedded platform.

Figure 5: Vitis Platform Project Flow