Performance and Resource Utilization for AXI4-Stream to Video Out v4.0

Vivado Design Suite Release 2015.3

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Artix-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_PIXELS_PER_CLOCK
C_S_AXIS_VIDEO_FORMAT
C_S_AXIS_VIDEO_DATA_WIDTH
C_NATIVE_COMPONENT_WIDTH
C_HAS_ASYNC_CLK
C_ADDR_WIDTH
C_HYSTERESIS_LEVEL
C_VTG_MASTER_SLAVE
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7a200t fbg676 -2 char_artix_24bit_1024deep_slave 1 2 8 8 1 10 12 0 vid_io_out_clk=200 aclk 357 229 343 368 0 1 0 PRODUCTION 1.14 2014-09-11
xc7a200t fbg676 -2 char_artix_256bit_1024deep_slave 4 6 16 16 1 10 12 0 vid_io_out_clk=200 aclk 319 229 575 557 0 7 1 PRODUCTION 1.14 2014-09-11
xc7a200t fbg676 -2 char_artix_64bit_8192deep_slave 1 6 16 16 1 13 12 0 vid_io_out_clk=200 aclk 275 301 430 442 0 15 0 PRODUCTION 1.14 2014-09-11
xc7a200t fbg676 -2 char_artix_8bit_32deep_slave 1 12 8 8 1 5 12 0 vid_io_out_clk=200 aclk 438 170 252 271 0 0 1 PRODUCTION 1.14 2014-09-11

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_PIXELS_PER_CLOCK
C_S_AXIS_VIDEO_FORMAT
C_S_AXIS_VIDEO_DATA_WIDTH
C_NATIVE_COMPONENT_WIDTH
C_HAS_ASYNC_CLK
C_ADDR_WIDTH
C_HYSTERESIS_LEVEL
C_VTG_MASTER_SLAVE
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7k325t ffg900 -2 char_kintex_24bit_1024deep_slave 1 2 8 8 1 10 12 0 vid_io_out_clk=300 aclk 535 241 343 368 0 1 0 PRODUCTION 1.12 2014-09-11
xc7k325t ffg900 -2 char_kintex_256bit_1024deep_slave 4 6 16 16 1 10 12 0 vid_io_out_clk=300 aclk 479 242 575 591 0 7 1 PRODUCTION 1.12 2014-09-11
xc7k325t ffg900 -2 char_kintex_64bit_8192deep_slave 1 6 16 16 1 13 12 0 vid_io_out_clk=300 aclk 404 338 430 481 0 15 0 PRODUCTION 1.12 2014-09-11
xc7k325t ffg900 -2 char_kintex_8bit_32deep_slave 1 12 8 8 1 5 12 0 vid_io_out_clk=300 aclk 535 182 252 280 0 0 1 PRODUCTION 1.12 2014-09-11

Virtex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
C_PIXELS_PER_CLOCK
C_S_AXIS_VIDEO_FORMAT
C_S_AXIS_VIDEO_DATA_WIDTH
C_NATIVE_COMPONENT_WIDTH
C_HAS_ASYNC_CLK
C_ADDR_WIDTH
C_HYSTERESIS_LEVEL
C_VTG_MASTER_SLAVE
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7vx485t ffg1761 -2 char_virtex_24bit_1024deep_slave 1 2 8 8 1 10 12 0 vid_io_out_clk=300 aclk 525 244 343 372 0 1 0 PRODUCTION 1.12 2014-09-11
xc7vx485t ffg1761 -2 char_virtex_256bit_1024deep_slave 4 6 16 16 1 10 12 0 vid_io_out_clk=300 aclk 525 243 575 601 0 7 1 PRODUCTION 1.12 2014-09-11
xc7vx485t ffg1761 -2 char_virtex_64bit_8192deep_slave 1 6 16 16 1 13 12 0 vid_io_out_clk=300 aclk 413 338 430 499 0 15 0 PRODUCTION 1.12 2014-09-11
xc7vx485t ffg1761 -2 char_virtex_8bit_32deep_slave 1 12 8 8 1 5 12 0 vid_io_out_clk=300 aclk 535 180 252 288 0 0 1 PRODUCTION 1.12 2014-09-11

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