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Zynq DPU v3.1 IP Product Guide
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Zynq DPU v3.1 IP Product Guide
Clocking and Resets
Introduction
Clock Domain
Zynq DPU v3.1 IP Product Guide
Introduction
Overview
Product Specification
DPU Configuration
Clocking and Resets
Introduction
Clock Domain
Register Clock
Data Controller Clock
Computation Clock
Reference Clock Generation
Reset
Development Flow
Example Design
Clock Domain
The following figure shows the three clock domains.
Figure
1
:
Clock Domains in the
DPU
Register Clock
Data Controller Clock
Computation Clock