The following UltraScale+™ devices are in production:
This release includes updates to these other popular IP cores:
There are no new IP Cores in this release
New Core Versions | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | |||||||
Audio, Video & Image Processing | ||||||||||||||
HDMI 1.4/2.0 (v3.0) | ✓ | PG235 (TX) PG236 (RX) |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
LogiCORE, DisplayPort (v2.1) | ✓ | PG199 (TX) PG233 (RX) |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
Video PHY Controller (v2.1) (DisplayPort) |
✓ | PG230 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ||||||||
Communications | ||||||||||||||
Ethernet | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | |||||||
10G/25G Ethernet Subsystem (25GEMAC / 25GBASE-KR) (v2.3) |
✓ | PG210 | AXI4 XGMII XXVGMII |
✓ | ✓ | |||||||||
40G/50G Ethernet Subsystem (50GEMAC / 50GBASE-KR2 / LAUI ) (v2.3) |
✓ | PG211 | AXI4-Stream |
✓ | ✓ | |||||||||
QSGMII* (v3.4) | PG029 | ✓ | ✓ | ✓ | ✓ | |||||||||
Wireless | ||||||||||||||
Peak Cancellation Crest Factor Reduction (v6.1) | ✓ | PB008 | ✓ | ✓ | ✓ | ✓ | ||||||||
DSP & Math | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
CORDIC* (v6.0) | PG105 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ||||||||
DDS Compiler* (v6.0) | PG141 |
AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ||||||||
Embedded | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
AXI Protocol Checker* (v2.0) |
PG101 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | |||||||||
AXI4 Stream Protocol Checker* (v1.2) | PG145 | AXI4-Stream |
✓ | ✓ | ✓ | |||||||||
I/O Module* (v3.1) | PG111 | ✓ | ✓ | ✓ | ✓ | |||||||||
LMB BRAM Interface Controller* (v4.0) |
PG112 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ||||||||
MicroBlaze Debug Module (MDM)* (v3.2) | PG115 |
AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
MicroBlaze Micro Control System (MCS)* (v3.0) |
PG116 | ✓ | ✓ | ✓ | ✓ | |||||||||
Interface and Interconnect | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
AXI Infrastructure |
||||||||||||||
AXI Interconnect* (v2.1) | PG059 |
AXI3 AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
AXI Stream Interconnect* (v1.1) | PG085 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ||||||||||
AXI SmartConnect* (v1.0) | PG247 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | |||||||||
AXI Stream Verification IP (VIP)* (v1.1) | PG277 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ||||||||
AXI Verification IP (VIP)* (v1.1) | PG267 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
Zynq UltraScale+ MPSoC Verification IP* (v1.0) | DS941 | AXI4 |
Zynq UltraScale+ |
|||||||||||
PCI Express® | ||||||||||||||
AXI Bridge PCI Express (PCIe) Gen3 Subsystem* (v3.0) | PG194 | AXI4 | ✓ Virtex 7 XT |
✓ | ✓ | |||||||||
DMA for PCI Express (PCIe) Subsystem* (v4.0) |
PG195 | AXI4 AXI4-Lite AXI4-Stream |
✓ XT |
✓ | ✓ | |||||||||
UltraScale Architecture PHY for PCI Express* (v1.0) | PG239 | ✓ | ✓ | |||||||||||
UltraScale+ Devices Integrated Block for PCI Express* (v1.3) | PG213 | AXI4-Stream | ✓ | |||||||||||
UltraScale FPGAs Gen3 Integrated Block for PCI Express (PCIe) * (v4.4) | PG156 | AXI4-Stream | ✓ | |||||||||||
Memory and Controllers | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
AXI BRAM Controller* (v4.1) |
PG078 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
Memory Interface* UltraScale/UltraScale+ v1.4 7 Series v3.0 |
✓ | ✓ | ✓ | ✓ | ||||||||||
Utility IP | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
Soft Error Mitigation (SEM)* (UltraScale v3.1) |
PG187 | ✓ | ✓ |
*Included at no additional charge with Vivado
**Included at no additional charge with EDK