We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!


AR# 1051

XNFPREP: Error 3526: Illegally inverted pin with XBLOX SYNC_RAM symbol


Keywords: xnfprep, error 3526, xblox, RAM

Urgency: Standard

General Description:

During compilation of a XC4000E design containing an XBLOX SYNC_RAM
component, XNFPrep may give the following error:

The pin 'D' on the symbol <symbol name> (type = RAMS, output signal =
[signal name]) is illegally inverted. This pin in non-invertible.

This error is occurs while placing either an INVBUS symbol or INV symbol on
the WR_CLK pin to clock the synchronous RAM on the falling edge. XBLOX
pushes the inversion onto the device pin instead of leaving the inverter
separate as it should.


Place an X (explicit) property on the net between the INV/INVBUS and the
SYNC_RAM. This will prevent the inverter from being absorbed into the D
pin of the synchronous RAM.
AR# 1051
日付 05/24/1999
ステータス アーカイブ
タイプ 一般