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AR# 1072

Fast outputs versus fast slew rate outputs in Xilinx devices


Here are a few points on fast outputs versus fast slew rate outputs in Xilinx devices.


1. Fast outputs in 9500 and 7300 devices are fast because they do not go through the UIM. This saves a level of logic's worth of delay because of the shorter path. You can specify a fast output by attaching an "F" property on the input net of

the 7k OBUF. In the XNF file, the F property gets attached to the SIG record corresponding to the OBUF input net.

You can verify that the fast output path has been used for the outputs in your design by checking the .res resource utilization report. It will report that X number of fast outputs have been used.

2. FAST *slew rate* outputs are faster because they drive a reduced impedance load. The ability to set outputs to FAST slew rate is supported in 3k, 4k, and 9k devices. In the 7300 family, only the 73144 supports fast slew rate.

FAST slew rate can be specified in several ways:

a. by adding the following line to your .pld file after your pin declaration section:

FAST ON [optional signal list]

b. by adding a =FAST property to the appropriate output buffer in the schematic.

The way to verify that this has been actually implemented by the software is to examine the .EQN file. This file reports the actual partitioning of the design. You should see the same "FAST ON" line with a list of output signals that have been set to the FAST slew rate.
AR# 1072
作成日 08/21/2007
最終更新日 03/12/2011
ステータス アーカイブ
タイプ 一般