AR# 10723

3.1isp6 XST Verilog - ERROR: "Bad Index In DomList (Function ListDelShift) ABORT: (MAIN_0027)."


Keywords: XST, case, concatenate, control, signals, Verilog, Index, function, DomList

Urgency: Standard

General Description:
I am synthesizing a case (or casex or casez) statement in XST Verilog in which two or more control signals are being concatenated as shown:

case ( {sel_a, sel_b})

I am encountering the following error:

ERROR: Bad Index In DomList (Function ListDelShift)
ABORT: (MAIN_0027).


Combine the two control signals into one control signal bus; or, make the case statement only operate based on one control signal and within each branch of the case statement. Check the status of the other control signal(s) using another case statement or an if/then clause.

NOTE: This problem is fixed in the 4.1i software release.
AR# 10723
日付 08/19/2002
ステータス アーカイブ
種類 一般