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AR# 11334

Virtex-II - Is there pin-out compatibility between the FF1152 and FF896 packages?


Is there pin-out compatibility between the FF896 and FF1152 packages in the Virtex-II family?


The FF896 is pin-out compatible with the FF1152 with the exception of the LVDS pairs. Additionally, the VRP/VRN pins in Bank 4 are not compatible: 


- For FF896, VRP is in AC10 and VRN is in AC11 

- For FF1152, VRP is in AK9 and VRN is in AJ8. 


If you use DCI in Bank 4, use ALT_VRP or ALT_VRN to allow user I/O compatibility.  


For more information on ALT_VRP or ALT_VRN, please see (Xilinx Answer 11208)


A diagram of the pin-out comparison between the FF1152 and FF896 packages is available in the Virtex-II Platform FPGA User Guide at: 

Chapter 5: PCB Design Considerations -> Pin-out Diagrams -> FF896 - FF1152 Pinout Compatibility Diagram

AR# 11334
日付 05/14/2014
ステータス アーカイブ
種類 一般