AR# 11469


3.1i XST - XST incorrectly processes the logical negation on a bus in Verilog. (a = !b)


Keywords: Verilog, negation, bus, !

Urgency: Standard

General Description:
The logical negation (a = !b) on a bus is incorrectly processed by XST.


This problem is fixed in the latest 3.1i Service Pack, available at:
The first service pack containing the fix is 3.1i Service Pack 8.
AR# 11469
日付 08/19/2002
ステータス アーカイブ
種類 一般
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