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AR# 12009

4.1i Synthesis and Simulation Design Guide - Mapping logic to unbonded I/O causes "ERROR:NGDBUILD:604 - logical block 'xxx' with type 'xxx' is unexpanded."

説明

Keywords: 4000XLA, Spartan, unbonded, I/O, logic, OFD, IFD, upad, XSI, Synopsys

Urgency: Standard

General Description:
The a section of the Synthesis and Simulation Design Guide (http://toolbox.xilinx.com/docsan/3_1i/data/common/sim/chap04/sim04006.htm) mentions instantiating the following unbonded I/O primitives:

- OFD_U
- IFDI_U
- OFDI_U
- IFD_U
- UPAD

How do I access these primitives?

ソリューション

The above primitives are only available in the Xilinx/Synopsys Interface primitives library. Either your EDIF file extension must be ".sedif" (instead of ".edn" or ".edf"), or the program line in the EDIF file:

(program "<vendor_name>")

needs to read:

(program "FPGA Express") or (program "FPGA Compiler II").
AR# 12009
日付 10/07/2003
ステータス アーカイブ
種類 一般
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