AR# 12009: 4.1i Synthesis and Simulation Design Guide - Mapping logic to unbonded I/O causes "ERROR:NGDBUILD:604 - logical block 'xxx' with type 'xxx' is unexpanded."
AR# 12009
4.1i Synthesis and Simulation Design Guide - Mapping logic to unbonded I/O causes "ERROR:NGDBUILD:604 - logical block 'xxx' with type 'xxx' is unexpanded."
The above primitives are only available in the Xilinx/Synopsys Interface primitives library. Either your EDIF file extension must be ".sedif" (instead of ".edn" or ".edf"), or the program line in the EDIF file:
(program "<vendor_name>")
needs to read:
(program "FPGA Express") or (program "FPGA Compiler II").