We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 12294

3.1i CORE Generator - IP4: Parallel Multiplier v_3 issues internal errors


Keywords: COREGen, multiplier, parallel, CIP4, internal, error

Urgency: Standard

General Description:
When I attempt to create the following core,

- Target = spartan2
- Core name = "mul_by_2_017"
- Parallel constant multiplier
- Create RPM, Rectangular shape
- Constant port B value = 1033 (not reloadable)
- Memory type distributed
- Register inputs, Port A 8-bits signed
- Registered outputs
- Minimum pipelining
- With asynchronous clear and enable

CORE Generator issues these errors:

"Errors Found

ERROR: An internal error has occurred. To resolve this error, please consult the Answers Database at http://support.xilinx.com
ERROR: Sim has a problem implementing the selected core. Implementation netlist will not be generated.
ERROR: SimGenerator: Failure of Sim to implement customization parameters core multyuu.
ERROR: Core multyuu did not generate EDIF implementation netlist (.EDN) file.
WARNING: Warnings and/or errors encountered while generating multyuu (Multiplier 3.1) All output products requested may not have been generated.
ERROR: Elaboration failure for core Multiplier.
ERROR: Elaboration of core Multiplier failed."


This issue has been fixed in Multiply Generator v4_0 , which is available with 4.1i and IP Update #1.

To obtain the latest IP update, please visit the IP center at:

AR# 12294
日付 08/23/2002
ステータス アーカイブ
種類 一般