AR# 12484


10.1 State Diagram Editor - When I generate HDL, StateCAD does not pass the compile stage (appears to hang)


When I generate HDL from a state diagram, StateCAD seems to hang. In this case, StateCAD is stuck in the first checking or compile stage.


During the compile stage, the minimization algorithm can appear to hang on "transition" (which uses a lot of product terms). This might happen when the design contains comparisons (e.g., ==, >=, etc.) or other equations that produce a large number of min terms.

Turning off minimization and indeterminate transition checking will solve this problem.

To turn off these two options:

1. Go to Options -> Configuration.

2. Uncheck the respective boxes ("Minimize" and "Indeterminate Transitions").

AR# 12484
日付 12/15/2012
ステータス アクティブ
種類 一般
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