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AR# 12954

9.1i PAR - What effect does the USELOWSKEWLINES constraint have on various device families?

説明

What effect does the USELOWSKEWLINES constraint have on various device families?

ソリューション

The USELOWSKEWLINES constraint is honored by the Virtex, Virtex-E, Spartan-II, and Virtex-II device families. 

 

For Virtex, Virtex-E, Spartan-II: 

USELOWSKEWLINES causes PAR to put the clock net on the backbone routing resources. If this cannot be done, PAR issues an error. 

 

For Virtex-II: 

USELOWSKEWLINES causes PAR to use a template to route nets in a particular way that reduces skew. If this cannot be done, PAR will not issue an error or warning.

AR# 12954
日付 05/14/2014
ステータス アーカイブ
種類 一般
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