We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 13004

8.1i Virtex-E MAP - Constants driving MUXCY direct inputs are configured with external LUT drivers rather than being sourced internal to the slice


A case has been seen where MAP appeared to be configuring a slice inefficiently because constant signals driving MUXCY direct inputs were sourced external to the slice instead of from the internal constant available in the CY0F/CY0G muxes which determine the DI pin connectivity. This occurred when one MUXCY DI pin was driven by GND and the other VCC. 


NOTE: This issue applies to Virtex, Virtex-E, and Spartan-II devices. This issue does not apply to Virtex-II devices.


This configuration is necessary due to a hardware limitation that both the CY0F/CY0G muxes in a slice must have the same configuration. This limitation dictates that unless both MUXCY DI pins in a slice are driven by the same constant value, then the CY0F/CY0G muxes must be configured for an external path.

AR# 13004
日付 05/14/2014
ステータス アーカイブ
種類 一般