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AR# 1312

XC3000/XC4000/XC5200: PAR ERROR 4kpl:7 - Too many TBUFs (TRISTATEs) driving longline

説明

A design that uses several TBUFs driving a single node/line
is implemented in Xilinx's FPGA architectures as follows:


| | | ...... |
\~~~/ \~~~/ \~~~/ \~~~/
--\ / --\ / --\ / --\ /
| | | |
========x=======x=======x=====================x======== horizontal
longline

The TBUFs in all FPGA architectures may access only the horizontal
longlines, and each longline has a limited number of TBUFs that can
access it. The number of TBUFs that may access a horizontal longline
for a given part is listed in the Data Book.

If PAR error 4kpl:7 is referencing TBUFs, then the problem is
that you have exceeded the number of TBUFs that can drive a single
longline.

ソリューション

The following design hint may or may not be practical
for your design.
Divide up your TBUFs into two of more groups, each
group driving its own node/line. Then, mux the resulting
lines together, and develop control logic to drive the
select line of the mux.



| | |
\~~~/ \~~~/ \~~~/
--\ / --\ / --\ /
| | |
========x=======x=======x=======|\
| \
| \
| | | |MUX|
\~~~/ \~~~/ \~~~/ | |---------out
--\ / --\ / --\ / | /
| | | | /
========x=======x=======x=======|/
AR# 1312
作成日 08/31/2007
最終更新日 10/20/2008
ステータス アーカイブ
タイプ 一般