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AR# 13250

4.1i ISE SP2 HDL Editor - Various wires are incorrectly highlighted (in pink) as system functions


Keywords: reserved, keyword, ISE, HDL Editor, Project Navigator, ProjNav, color, function, system task, Verilog, pink

Urgency: Standard

General Description:
When I write Verilog in ISE 4.1i SP2 HDL Editor, system tasks and functions are highlighted in pink, even when the leading "$" is not used.

For example, if the name "write" is used in Verilog source code, the color turns to pink. "$fwrite" and "$write" should be highlighted, but "write" should not be.

Is this a Xilinx reserved word?


The HDL Editor data file incorrectly interprets "write" and other function and system task names as functions, even though they do not have a leading "$".

This is a only a visual bug, and it does not affect any other functions.
AR# 13250
日付 08/11/2003
ステータス アーカイブ
種類 一般