General Description: When I target a Virtex-E FPGA in Foundation Classic, the post-route simulation of a design using a DLL component causes the warning below in the netlist.log file, and the simulation related to this component is not performed:
"Warning 9199: Unknown component - _I8, x_clkdlle. Warning 9193: Some IC Models not loaded. They were not found or not available in the keylock."
When a Virtex-E device is targeted, the component "x_clkdlle" is automatically used in the simulation netlist (time_sim.edn). If one of the three DLL components available in the library (CLKDLL, CLKDLLE and CLKDLLHF) is used, the warning will be generated.
You can work around this problem by replacing x_clkdlle by, x_clkdll, x_clkdll2, or xclkdllhf in the netlist time_sim.edn (with respect to the primitive used in the design).