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AR# 1461

5.x XDE, XACT - Why is the INIT value shown for RAM/ROM different than what I specified?


Users going into EditBlock within XDE may see that the value stored in
their RAM or ROM is different from the value specified in the INIT statement
or their .MEM file. For example, if a 16x1 RAM was placed in schematic with
the INIT attribute of "INIT=0123", when you go into XDE to edit that RAM
CLB you could see a different value such as "0053".



This is not necessarily a problem. PPR may "swap" the address
lines in some cases to make the design more routable. This is
OK so long as the memory contents of the RAM/ROM are adjusted
to reflect this swapping. Using the previous example, here is
how the INIT=0123 is implemented in the .xft file (before PPR):

SYM, U_LITT1, RAM, INIT=0123, LIBVER=2.0.0
PIN, D, I, D_L
PIN, A0, I, A0L
PIN, A1, I, A1L
PIN, O, O, O_L
PIN, A2, I, A2L
PIN, A3, I, A3L

Notice pin A0 is connected to net A0L, A1 to A1L, etc. This
is how it was done in schematic. Now, after a PPR run, if
you run LCA2XNF to see what PPR did, you might get:

SYM, O_L, RAM, LIBVER=2.0.0, INIT=0053
PIN, O, O, O_L, 2.7
PIN, A3, I, A1L, 1.8
PIN, A2, I, A0L, 1.3
PIN, A1, I, A2L, 1.6
PIN, A0, I, A3L, 1.7
PIN, WE, I, YSIG2, 7.3:0.0
PULSE, WE, +, 4.0
PIN, D, I, YSIG1, 6.3

Notice pin A3 is now connected to net A1L, A2 to A0L,
A1 to A2L, A0 to A3L. Notice the INIT value is now 0053
also. If you perform this new mapping, you do indeed get
0053. Therefore, there is no problem.


There was a bug in the 4000E pre-release where the INIT value
on 32x1 and 16x1 RAMs were not passed on correctly. This
has been fixed in 5.2.1. If the design came from the 4000E
pre-release, there is a utility on the BBS/FTP site called
CHKINIT that will determine if the INIT values are correct.
AR# 1461
日付 03/22/2000
ステータス アーカイブ
種類 ??????