We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 1590

Viewsynthesis - vhdl error: the name "pfalling"/"prising" is undefined


Viewsynthesis v7.2 doesn't support the old Viewlogic subset VHDL
functions or data types anymore. The following error occurs during compile:

vhdl: Error: the name "pfalling" is undifined.
vhdl: Error: this name has an invalid prefix.


If the design uses prising and pfalling, as well as any other
Viewlogic subset VHDL functions or data types, you can compile
the code by turning on the "Compile as VS6.x Flow" which is
found in the Advanced settings in the synthesis settings.
AR# 1590
日付 11/08/2004
ステータス アーカイブ
種類 一般