I am trying to determine the C_BASEADDR and C_HIGHADDR parameter values and I have a related question:
Is it possible (using this OPB_DDR/PLB_DDR) to map 256 MB (0x0000_0000 to 0x0FFF_FFFF) of memory space for DDR SDRAM while only having 64 MB of physical DDR SDRAM present?
For a 256 MB memory space to alias 64 MB physical memory, you can set C_BASEADDR = 0x0000_0000 and C_HIGHADDR = 0x0FFF_FFFF. Also, there is a section in the DDR design specification that describes how the DDR address is sliced from the PLB/OPB address bus. Refer to the section "Connecting to Memory" -> "Memory to FPGA Connections" -> "DDR Address Mapping".