UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 1723

XC5200: Use of DI pin to a flipflop in a Logic Cell (LC)

説明

Urgency: Standard

Keywords: BYPASS, XC5200, SHIFT, RLOC, FFD,

Description

The DI pin on a Logic-Cell offers an efficient bypass for a
signal to connect to the D input of a Flipflop without wasting
the function generator for feeding through.
The benefit of this feature gets important when a design
contains large shift registers, Johnson counters or LFSR
structures. The DI pin is used whenever possible by ppr
automatically. In some designs it may look like the software
does not use the DI although it appears that it should use it.

ソリューション

Check which Flipflop elements you are using to build the
function (for example the shift register). Macros like
FDR have underlying levels of logic and you can step down
in hierarchy.
This logic prevents the software to use the DI pins.
Use FDCE as a flipflop primitive to build the register
and ppr will use the direct input DI.
AR# 1723
作成日 08/31/2007
最終更新日 10/01/2008
ステータス アーカイブ
タイプ 一般