The NumDip2Matches is set to a fixed value in my design.
According to the data sheet, the core is supposed to clear the SrcOof (Source Out of frame) signal when a consecutive number of Dip2 matches (defined by the signal NumDip2Matches) is received.
In simulation and in the hardware this does not appear to be working correctly.
In the Xilinx SPI4.2 source core, an internal signal match reflects the number of DIP2s the core has seen thus far. This signal can be added into the waveform and monitored.
If the value of the signal match is equal to NumDip2Matches, the core should deassert SrcOof
The signal match will increment every time a valid DIP2 is seen by the core.
One scenario where the value of match would not increment on a valid DIP2 would be if the following scenario is seen:
Immediately after the source core goes out of frame (SrcOof = '1'), the core will resync itself to the first"11" to non "11" transition (on the TStat bus ) as a start of a status sequence.
Hence, the last DIP2 before this transition will be ignored.