We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 18422

ML300 - On the ml300 there is a multiplexer on the JTAG signal. Do you know what this does and when it is used?


Keywords : ML300, mux, JTAG, external 




General Description: 

On the ml300 there is a Multiplexer on the JTAG signal. Do you know what this does and when it is used? I didn't understand the external MUX. I see that it switches the JTAG between the two JTAG connectors, but I don't understand when you use this. This MUX is controlled by patch J204, which is empty. 


Refer to Figure 5-15 in the PDF page 92 UG038 (v1.2) January 29,2003.


Please refer to Page 3 and page 26 of the schematics.  


P114 is the 0.1 inch header used to talk to JTAG probes such as the VisionProbe from Wind River. 


P115 is the 2mm header used to talk to the Xilinx PC4 cable. 


J204 allows you to select which of those to use. When the jumper is off, P115 is usable to download FPGA bitstreams and SW Code, as well as SW debug. When the J204 jumper is on, P115 no longer functions, and P114 is now usable to download SW Code and to do SW Debug. Note that when J204 jumper is on, it is NOTpossible to load the FPGA bitstream. This is because the debug header P114 is intended solely for SW download and debug. 


The schematics and documentation page listed are all consistently in error. The problem is the labeling of what is "0" and what is "1" on the MUX (U28). They are *ALL* wrong. If you refer to Page 26: The "A/B", Pin 1, when active LOW selects the A port, and when HIGH selects the B port. This is the opposite of how the MUXes are labled with "1" and "0". An should be "0", and Bn should be "1". This error is repeated throughout all the documentation because it was a copy paste.

AR# 18422
日付 05/16/2014
ステータス アーカイブ
種類 一般