This solution record is no longer valid. Do not use it. Tsu is a defined delay in the 9/98 data book.
When using time-specs to specify tSU, remember the clock buffer
delay (tGCK) must be added to tSU. This is necessary because
XACT Performance only recognizes the total delay from PADS to
FFS and will not automatically subtract the clock buffer delay.
For example, if a 4.5ns tSU is required (XC9535-5), a 6.5ns
PADS to FFS time-spec is needed.
4.5ns(tSU) + 2.0ns(tGCK) = 6.5ns(total PAD to FFS)
The tGCK specifications are not in the latest data book (9/96),
so use the following tGCK specifications:
-5 devices ..................... tGCK = 2.0ns
-7 devices ..................... tGCK = 2.5ns
-10, 15, 20 devices ............ tGCK = 3.0ns
In M1, as an alternative to the FROM:TO style timespec, you can use the OFFSET property in a UCF file to directlty specify a tSU value with respect to the clock pin. The syntax is:
NET d_input_pin OFFSET=IN:tsu_value:AFTER:clock_pin;
But you MUST explicitly assign the clock signal to a global clock pin (GCK) by using either a BUFG library symbol or applying the "BUFG=CLK" attribute to an input pad or its IBUF symbol.