AR# 19042


LogiCORE SPI-4.2 (POS-PHY L4) v6.1 - BitGen "ERROR:DesignRules:10 - Netcheck: The signal "pl4_snk_top1/pl4_snk_io0/DynamicAlign.pbd/...." is completely unrouted."


General Description 

When implementing SPI-4.2 design on PC or Unix using ISE6.1i or ISE6.2i, you might receive following BitGen drc error: 


ERROR:DesignRules:10 - Netcheck: The signal 

"pl4_snk_top1/pl4_snk_io0/DynamicAlign.pbd/dc/sync(1)" is completely unrouted. 


Furthermore, PAR report file (*.par) will indicate that not all signals were completely routed.


This might happen if you are running the implementation without the MAP "-timing" switch. Note that the Design Example delivered with SPI-4.2 v6.1 core does not have the "-timing" switch in the "implement.bat" script, although it is there on the implement (UNIX) script. 


Please be sure to use the MAP "-timing" switch regardless of whether you are on UNIX or PC if you are using ISE 6.1i or 6.2i. Also, when running PAR, use the effort level "high" for -pl and -rl or -ol (overall effort level). 


The correct command for MAP and PAR is: 


map -timing design_top -o mapped.ncd 

par -pl high -rl high -w mapped.ncd routed.ncd 


par -ol high -w mapped.ncd routed.ncd

AR# 19042
日付 05/16/2014
ステータス アーカイブ
種類 一般
People Also Viewed