AR# 19879

LogiCORE 10 Gigabit Ethernet MAC v5.0 Core - Release Notes and Known Issues for the 10 Gigabit Ethernet MAC Core


General Description: 

This Answer Record contains the following information for the LogiCORE 10 Gigabit Ethernet MAC v5.0 Core, which is released in 6.3i IP Update 3 and IP Update 4: 


- What's New 

- Known Issues 


For the installation instructions and for the software requirements, please see (Xilinx Answer 19939) for 6.3i IP Update 3 and (Xilinx Answer 20083) for 6.3i IP Update 4. 


NOTE: The 10 Gigabit Ethernet MAC v5.0 Core is identical in both 6.3i IP Update 3 and IP Update 4 releases.


What's New 



- Support added for Virtex-4. 


- Simplified the core by removing the XAUI output option (this functionality is now supported in a separate core, the XAUI LogiCORE, which users can instantiate separately). 


- Management blocks enhanced to use main core user clock with clock enables rather than using the MDC clock on local routing. 


- Statistics block now runs in the transmitter clock domain. 


- Enhanced Verilog demonstration test-fixture. 


- Enhanced MTI scripts used with demonstration testbenches to make simulation clearer. 


- New documentation has been added, including Getting Started Guide and User Guide. 


Bug Fixes 

- Fixed an issue in which frames with specific corrupt preambles would cause the following frame to be marked as bad regardless of its validity. 


- Corrected an issue in which valid frames would be marked as having a bad CRC if the preceding IFG had one or more error characters during the idle time. 


- Fixed an issue with the Length/Type Out of Range bit in the rx_statistics_vector (bit 25 in v4.0 or bit 28 in v5.0 did not correctly count undersized frames). 


Known Issues 

- The data sheet that is copied to the project when the XAUI v5.0 Core is generated is incorrectly named "xaui_ds365.pdf". The correct name should be "xaui_ds265". This will be fixed in the next release of the core.

AR# 19879
日付 05/16/2014
ステータス アーカイブ
種類 一般