General Description: While attempting to add timing specifications in the Synopsys environment, users may realize that the specifications "set_max_delay" and "set_false_path" do not get passed on (in the form of C2S, P2S, C2P specs) to the .sxnf file. This is due to the command "replace_fpga", which may change instance names of some of the registers.
Execute the command twice; once before "compile" (for Synopsys), and once after "replace_fpga" (for XACT). You will need to verify the instance name of your flops after "replace_fpga".
To list out the instance name of you flops, you can run "all_registers" (Synopsys 3.3b or newer) at the top-level after executing "replace_fpga".
Using the Xilinx-supplied Perl scripts Addtnm and Maketnm instead of Synopsys constraints is an alternative. See (Xilinx Solution 1016) for more information.