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AR# 21976

LogiCORE SPI-4.2 (POS-PHY L4) Lite v3.0 - Locked_RDClk is undefined in simulation

説明

For Sink user clocking mode, the Locked_RDClk signal is undefined for the duration of simulation.

ソリューション

This issue has been resolved in SPI-4.2 v4.1 Core.

AR# 21976
日付 05/19/2014
ステータス アーカイブ
種類 一般
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