UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 22700

LogiCORE Block Memory Generator v1.1 - I receive invalid output when asserting WE and SSR simultaneously in NO_CHANGE mode

説明

In simulation, invalid output occurs when asserting WE and SSR simultaneously in NO_CHANGE mode. This occurs when the following conditions exist: 

 

- Operating mode is "NO_CHANGE"  

- Primitive output registers are used  

- Core output registers are not used  

- And SSR input is used

ソリューション

This issue has been fixed in Block Memory Generator v3.1. Please upgrade to the latest core.

AR# 22700
日付 05/19/2014
ステータス アーカイブ
種類 一般
このページをブックマークに追加