General Description: Map is unable to combine a CLB driven by 2 external signals with DFFS sharing the same SR control signal. This is a valid CLB combination that requires Map to use the G-LUT to feed the H-LUT, and to also use the H1 and DIN pins, since SR is already being used.
This problem has been documented as bug number 12429.
Please refer to the Xilinx M1.3 Conversion Guide application note for more detailed information concerning unsupported CLB combinations.
One possible workaround would be to manually create the desired CLB configuration in EPIC, converting it into a physical macro, then instantiating the macro in your design.
For more information on creating physical macros, refer to the (Xilinx Manual EPIC Design Editor Reference/User Guide).