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AR# 23416

MIG Spartan-3 Generation FPGA DDR/DDR2 - Can Spartan-3 FPGA MIG designs be modified to support deep memory configurations?


MIG does not support deep memory configurations for Spartan-3 FPGA DDR/DDR2 controllers. The "Depth" option is greyed out in the MIG tool.

Can the output controller design be modified to support a deep memory configuration?


There are no architectural reasons that deep memory configurations cannot be used in Spartan-3 architectures.  

To change the design depth, modify the design as follows: 

  1. Generate new address decoding logic. Additional address bits must be added to fit the application. 
  2. The chip-selects for the SDRAMs must be generated based on the upper address bits. In single-depth configurations, the chip-selects are static and generated in the design.
AR# 23416
日付 05/20/2014
ステータス アーカイブ
種類 一般
  • Spartan-3
  • Spartan-3 XA
  • Spartan-3A
  • More
  • Spartan-3A DSP
  • Spartan-3AN
  • Spartan-3E
  • Less
  • MIG