Problem Description: A design compiled with Design Compiler may get a warning about an unexpanded block from ngdbuild, followed by an error from map on the same unexpanded block. This unexpanded block may be DesignWare component that does exist in the xdw_xcXXXX.sldb file, like an INC_DEC_TWO_COMP_6, ADD_SUB_UB_12, etc.
Resolution 1: Add following synthesis attributes into .synopsys_dc.setup file. Or use Xilinx template for .synopsyy_dc.setup at $XILINX/synopsys/examples/template.synopsys_dc.setup_dc. Refer to Synopsys IVIEW on-line docuementation for more information on the following attributes.