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AR# 2748

FPGA Configuration (4000E only) - ALL I/O (including DONE) are 3-state during configuration


General Description:

During configuration, all I/O including the DONE pin are 3-stated with a weak pullup.


Under certain circumstance, it is possible for ALL I/O to go into 3-state with a weak pullup. This can happen during programming (configuring the device), or during reprogramming of the device.

There is actually an 8th reserved and undocumented mode of configuration. This is a special Test Mode that is entered by holding M0 High, M1 and M2 Low, and then bringing the Program pin Low. When this occurs, the device goes into the Test Mode and All I/O are in a 3-state (with a pullup) condition. The device stays in the Test Mode until the mode pins change.

Also, it is possible that if the mode pins are floating, the device might stay in the Test Mode until power down. This is why it is a good reason to either pullup or pulldown the mode pins to the proper level for the desired configuration mode.

AR# 2748
日付 05/07/2014
ステータス アーカイブ
タイプ 一般