' of type 'GCK/I/O'..."">


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AR# 29866

9.2i CPLDFit - "ERROR:Cpld:1122 - The ClockDivider is assigned to pin '' of type 'GCK/I/O'..."


When using the Clock Divider in CoolRunner-II CPLDs and using either GCK0 or GCK1 as the input clock, the following error occurs in CPLDfit :  


"ERROR:Cpld:1122 - The ClockDivider is assigned to pin '23' of type 'GCK/I/O'.  

The ClockDivider must either be assigned to the GCK2 pin or have no pin 



Can I connect the input clock of the clock divider to any GCK pin?


CoolRunner-II CPLDs (128 MCs or larger) provide a built-in hardware clock divider. Only GCK2 has the dedicated routing to the clock input of Clock Divider, i.e. neither GCK0 nor GCK1 can be assigned to CLKIN of ClockDivider.

AR# 29866
日付 05/08/2014
ステータス アーカイブ
種類 一般