Can you TIG the path from the Tristate of IOB to input?
When you have a bi-directional IOB using the IODELAY element there is a valid Tristate path that you can ignore.
The tool recognizes a path on the Tristate signal from the ILOGIC through the IODELAY to the IDDR register. This is a valid path, but can fail timing and can be ignored. You should apply a TIG constraint.