AR# 30502

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10.1 Timing Anlaysis - Can you TIG the path from the Tristate of IOB to input?

説明

Can you TIG the path from the Tristate of IOB to input?

ソリューション

When you have a bi-directional IOB using the IODELAY element there is a valid Tristate path that you can ignore. 

 

The tool recognizes a path on the Tristate signal from the ILOGIC through the IODELAY to the IDDR register. This is a valid path, but can fail timing and can be ignored. You should apply a TIG constraint.

AR# 30502
日付 05/22/2014
ステータス アーカイブ
種類 一般
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