When ngd2vhdl creates an HDL file for simulation, a data type called std_logic_vector2 is sometimes used.
std_logic_vector2 is a VHDL data type defined by the Xilinx simulation libraries. This datatype can be found in VHDL files created by ngd2vhdl. ngd2vhdl uses the std_logic_vector2 data type if the original design contained 2-dimensional arrays.
The std_logic_vector2 data type is defined in the VITAL libraries in M1.3/M1.4. When the VHDL file from ngd2vhdl contains the data type std_logic_vector2, and a VHDL simulator that analyzes the VHDL from ngd2vhdl errors, and says that the data type std_logic_vector2 is undefined, this means that the VITAL libraries are not setup correctly with the VHDL simulator.
The VITAL libraries for M1.3/M1.4 are located in $XILINX/vhdl/src
If the Synopsys VSS simulator tool, vhdlan, errors and says that the data type std_logic_vector2 is undefined, there are three possible causes: the .synopsys_vss.setup file is missing, the .synopsys_vss.setup file has incorrect paths, the VITAL libraries have not been compiled for the correct version of Synopsys.
The .synopsys_vss.setup file must be present in the directory that vhdlan is invoked. An example .synopsys_vss.setup file is in a file called $XILINX/synopsys/examples/template.synopsys_vss.setup
The .synopsys_vss.setup file has paths which tell the VSS simulator where to find the simulation files. If you get an error from VSS/vhdlan that std_logic_vector2 is not defined, the paths for the SIMPRIM libraries in incorrect. In the example .synopsys_vss.setup file, the SIMPRIM library is set as follows:
Check that this path exists. Check that the $XILINX variable is set correctly. Make usre that this is where the SIMPRIM(VITAL) libraries were installed by your system administrator.
The last possibility is that the SIMPRIM(VITAL) libraris were not compiled for the correct version of Synopsys. Out of the box, the SIMPRIM(VITAL) libraries are compiled for Synopsys v3.4b. If you are using a newer version fof Synopsys, these simulation libraris must be recompiled. See Xilinx Solution 1189 and Xilinx Solution 2311 for more info.