AR# 3570: A1.4/F1.4 PAR - PAR introduces DRC error: "ERROR:x45dr - netcheck: Signal <net> is routed to the O pin of block <comp> on routing which is not available because the EC pin is using the Logic Zero option.
AR# 3570
A1.4/F1.4 PAR - PAR introduces DRC error: "ERROR:x45dr - netcheck: Signal <net> is routed to the O pin of block <comp> on routing which is not available because the EC pin is using the Logic Zero option.
説明
PAR appears to finish successfully, but DRC flags the following error introduced during routing:
ERROR:x45dr - netcheck: Signal <net> is routed to the O pin of block <comp> on routing which is not available because the EC pin is using the Logic Zero option.
ソリューション
A fix for this routing error is included in the current M1.4 Core Applications patch available from the Xilinx Download Area: