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AR# 3675

V1.5, V1.4 CORE Generator - Which cores / modules are being shipped in these releases?

説明

Keywords: core, IP, CORE Generator, COREGen

Urgency: Standard

General Description:
This solution lists the modules that are available in CORE Generator v1.4.0 and v1.5.0.

Datasheets for the AllianceCORE and PCI modules
are provided with information on accessing them.

ソリューション

1

COREGEN V1.4.0 Release
----------------------
In the AllianceCORE folder, only datasheets and contact
information are provided for those cores sold by third party
Alliance Partners. Alliance COREs must be purchased from
the appropriate Alliance CORE Partner.

In the v1.4.0 release, the following cores (listed under the
LogiCORE folder) are provided free of charge:

Basic Elements
--------------
2-1 Multiplexer
3-1 Multiplexer
4-1 Multiplexer

Parallel to Serial Converter
Register

DSP Building Blocks
-------------------
16 Deep Non Symmetric Time Skew Buffers
16 Deep Symmetric Time Skew Buffers
32 Deep Non Symmetric Time Skew Buffers

Sine-Cosine Look-up Table

Filters
-------
PDA FIR Filter
Comb filter

Math Modules
------------
Scale by Half Accumulators
Registered Adder
Registered Loadable Adder
Registered Loadable Subtracter
Registered Scaled Adder
Registered Serial Adder
Registered Subtracter

Complementers
-------------
1's or 2's Complementer

Multipliers
-----------
Non-pipelined Constant Coefficient Multipliers
Pipelined Constant Coefficient Multipliers
Parallel Multiplier - Area Optimized

Integrator
Square Root

Memories
--------
Delay Element
Registered Dual Port RAM
Registered ROM
Registered Single Port RAM
Synchronous FIFO


Spec sheets only are provided for

- all Alliance COREs,
- SDA FIR filter, and
- Speed-Optimized Parallel Multipliers (8x8 and 12x12)

Sometime after March 31, 1998, a comprehensive list of
available core modules will be available on the CORELINX
web site at

http://www.xilinx.com/products/logicore/coregen/index.htm

This list will be updated on an ongoing basis as new cores
become available.

2

COREGEN v1.5.0
--------------
In the AllianceCORE folder, only datasheets and contact
information are provided for those cores sold by third party
Alliance Partners. These cores must be purchased.

In the v1.5.0 release, all cores (listed under the
LogiCORE folder) are provided free of charge, the PCI
LogiCOREs being the only exception:

Basic Elements
--------------
2-1 Multiplexer
3-1 Multiplexer
4-1 Multiplexer

Parallel to Serial Converter
Register

DSP Building Blocks
-------------------
16 Deep Non Symmetric Time Skew Buffers
16 Deep Symmetric Time Skew Buffers
32 Deep Non Symmetric Time Skew Buffers

Sine-Cosine Look-up Table


Filters
-------
SDA FIR Filter
PDA FIR Filter
Comb filter

Math Modules
------------
Scale by Half Accumulators
Registered Adder
Registered Loadable Adder
Registered Loadable Subtracter
Registered Scaled Adder
Registered Serial Adder
Registered Subtracter

Complementers
-------------
1's or 2's Complementer

Multipliers
-----------
Non-pipelined Constant Coefficient Multipliers
Pipelined Constant Coefficient Multipliers
Parallel Multiplier - Area Optimized
Speed Optimized 8x8 Parallel Multiplier *
Speed Optimized 12x12 Parallel Multiplier *
Integrator
Square Root

Memories
--------
Delay Element
Registered Dual Port RAM
Registered ROM
Registered Single Port RAM
Synchronous FIFO
Single Port Block RAM (Virtex only)
Dual Port Block RAM (Virtex only)


Spec sheets only are provided for

- all Alliance COREs,


Sometime after March 31, 1998, a comprehensive list of
available core modules will be available on the CORELINX
web site at

http://www.xilinx.com/products/logicore/coregen/index.htm

This list will be updated on an ongoing basis as new cores
become available.
AR# 3675
作成日 03/23/1998
最終更新日 02/21/2001
ステータス アーカイブ
タイプ 一般