FPGA Express: Concatenating select bits of mux causes error VSS-1029
説明
Keywords: VSS-1029, Foundation Express, FPGA Express, mux, select, bus
Urgency: Standard
General Description: In FPGA Express, creating a simple mux in VHDL with two select bits causes error when concatenating these two bits to form a two signal bus. Such code in VHDL could look like this:
begin sel_bus <= s1 & s0;
process(sel_bus, a, b, c, d)
begin case (sel_bus) is when "00" => out <= a; when "01" => out <= b; when "10" => out <= c; when "11" => out <= d; end case; end process;
The error produced by Express is:
"Expression must be the name of an object whose subtype is locally static, or it must be a qualified expression or type conversion whose type mark denotes a locally static subtype. (VSS-1029)"
This error points to the line containing "case (sel_bus) is".
ソリューション
The solution is to remove the parenthesis from line causing the error. The resulting code will look like this:
begin sel_bus <= s1 & s0;
process(sel_bus,a,b,c,d)
begin case sel_bus is when "00" => o <= a; when "01" => o <= b; when "10" => o <= c; when "11" => o <= d; when others => o <= '-'; end case; end process;