We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Internet Explorer 11,
Safari. Thank you!
ERROR:MapLib:1209 - Retargeting of PLL u_delayctrl/u_dcm_ddr/PLL_ADV_INST has COMPENSATION attribute is set to DCM2PLL or PLL2DCM. This is not supported yet in the tools to target a single MMCM. To enable an unoptimized retargeting please set XIL_MAP_NO_PLL2MMCM_COMP_ERROR environment variable.
ERROR:MapLib:1213 - DCM to MMCM retargeting of block 'u_dcm_ddr/DCM_ADV_INST' is not possible. Its target frequency, FVCO, is out of range. Valid FVCO range varies depending on speed grade: 600 - 1200MHz(-1), 1440MHz(-2), 1600MHz(-3).
The computed FCVO is a function of the input frequency CLKIN_PERIOD, the division factor DIVCLK_DIVIDE, and the CLKFX_DIVIDE and CLKFX_MULTIPLY attributes. The CLKIN_PERIOD attribute may have been set by ngdbuild based on the user specified PERIOD constraint.