AR# 40547: 13.1 - ChipScope - IBERT - When generating an IBERT Virtex-6 GTX core I see the following messages - "ERROR:sim - Unable to evaluate Tcl command: ::xilinx::sim::generation::generatePsfCore {chipscope_ibert_virtex6_gtx_v2_05_a} {chipscope_ibert} {ALL}"
ERROR:sim - runMap : IBERT:map: Check report <user path>/tmp/_cg/_bbx/example_chipscope_ibert.map.mrp for more information. ERROR:sim - WARNING:coreutil - map failed on example_chipscope_ibert. invoked from within "runMap example_[getComponentName] "" " (procedure "components::chipscope_ibert::post_generation" line 28) invoked from within "$PostGenerationTargets" (procedure "::xilinx::sim::generation::generatePsfCore" line 66) invoked from within "::xilinx::sim::generation::generatePsfCore {chipscope_ibert_virtex6_gtx_v2_05_a} {chipscope_ibert} {ALL}" ERROR:sim - Unable to evaluate Tcl command: ::xilinx::sim::generation::generatePsfCore {chipscope_ibert_virtex6_gtx_v2_05_a} {chipscope_ibert} {ALL} ERROR:sim - Error found during generation.
ERROR:Place:1145 - Unroutable Placement! A GT / BUFGCTRL clock component pair have been found that are not placed at a routable GT / BUFGCTRL site pair. The GT component <U_CHIPSCOPE_IBERT/U0/U_IBERT_CORE/U_GTCPX_X0Y14/U_GT/gtxe1_i> is placed at site <GTXE1_X0Y14>. The corresponding BUFGCTRL component <U_CHIPSCOPE_IBERT/U0/U_IBERT_CORE/U_GTCPX_X0Y14/U_RXRECCLK_BUFG> is placed at site <BUFGCTRL_X0Y30>....